| PART |
Description |
Maker |
| 74VHC74MTC 74VHC74N 74VHC74SJ 74VHC74 74VHC74MTCX |
Dual D-Type Flip-Flop 双D型触发器
Supervisor Push-Pull Active High, -40C to 85C, 3-SOT-23, T/R
Dual D-Type Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
|
| HCTS74MS |
Flip Flop, D-Type, with Set and Reset, TTL Inputs, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil
|
| NC7SZ175P6 NC7SZ175P6X NC7SZ175 NC7SZ175L6X |
TinyLogic UHS D-Type Flip-Flop LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, DSO6
TinyLogic UHS D-Type Flip-Flop
TinyLogic UHS D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| HD74LS107A HD74LS107AFP HD74LS107AP HD74LS107ARP |
Dual J-K Flip-Flops with Clear
Dual J-K Negative-edge-triggered Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| M54HC11204 M54HC112 M54HC112K1 M54HC112D M54HC112D |
RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
|
STMicroelectronics
|
| 74AUP2G79GF 74AUP2G79GS |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| 74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
| ACS374DMSR ACS374D ACS374HMSR FN3997 ACS374MS ACS3 |
Radiation Hardened Octal D Flip-Flop/ Three-State
Radiation Hardened Octal D Flip-Flop, Three-State
From old datasheet system
Radiation Hardened Octal D Flip-Flop Three-State
D Flip Flop, Octal, Tri-State, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| HEC4027BT-T HEC4027BT112 HEC4027BT118 |
Dual JK flip-flop 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
Dual JK flip-flop; Package: SOT109-1 (SO16); Container: Tube 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
Dual JK flip-flop; Package: SOT109-1 (SO16); Container: Reel Pack, SMD, 13"
|
NXP Semiconductors N.V.
|
